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  2. MARC view: A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems
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A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems (Record no. 353987)

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MARC details
000 -LEADER
fixed length control field 00527nam a2200097Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 180130s9999 xx 000 0 und d
245 ## - TITLE STATEMENT
Statement of responsibility, etc Nakamura, Kazuhiro; Shimazaki, Ryo; Yamamoto, Masatoshi; Takagi, Kazuyoshi; Takagi, Naofumi
Title A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Date of publication, distribution, etc 2015
300 ## - PHYSICAL DESCRIPTION
Extent Book title: Embedded systems : high performance systems, applied principles and practice--Acession number C20720; pages 129-146
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element EMBEDDED SYSTEMS
Holdings
Withdrawn status Lost status Damaged status Home library Current library Date acquired Total Checkouts Date last seen Price effective from Koha item type
      College Library College Library 01/30/2018   01/30/2018 01/30/2018 Book Chapter

A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems

APA

(2015). A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

Chicago

2015. A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

Harvard

(2015). A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : .

MLA

A VLSI architecture for output probability and likelihood score computations of HMM-based recognition systems. : . 2015.

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SOUTHVILLE LIBRARY

Southville International School and Colleges Library

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